1. Field
Example embodiments relate to stack-type semiconductor packages. Also, example embodiments relate to stack-type semiconductor package sockets and/or stack-type semiconductor package test systems.
2. Description of Related Art
As a semiconductor manufacturing technology develops, a semiconductor package with higher integration has been realized. In addition, various electronic devices are pursuing multi-function and miniaturization, which means that the semiconductor packages should be made in smaller sizes while performing more functions.
The size of the existing semiconductor packages greatly depends on the size of a semiconductor chip, and thus the size of the semiconductor package can be reduced by realizing high integration of the semiconductor chip. However, since it is very difficult to reduce the size of the semiconductor chip, there is a limitation to reducing the size of the semiconductor package.
Recently, a multi-chip semiconductor package, in which a plurality of semiconductor chips are packaged in a single semiconductor package, has been introduced. The multi-chip semiconductor package is high in integration of the semiconductor package since a plurality of semiconductor chips are packaged in one semiconductor package and more semiconductor chips can be arranged in the same-sized area. How ever, the multi-chip semiconductor package has a problem in that the whole semiconductor package can not be used when one of a plurality of semiconductor chips is defective or a wire for connecting the semiconductor chips is defective.
In order to solve the above described problem of the multi-chip semiconductor package, a stack-type semiconductor package has been suggested. The stack-type semiconductor package realizes the small mounting area size and the high integration, such that a plurality of semiconductor packages that respectively comprise one or more semiconductor chips are stacked. The stack-type semiconductor package has a high manufacturing yield since it has a structure in which a plurality of semiconductor packages are stacked and a defective semiconductor package can be separately replaced.
FIG. 1A shows a related art 4-unit stack-type semiconductor package in which four semiconductor packages are stacked.
The semiconductor packages are classified into various types according to the form of their leads, for example, a single inline package (SIP), a dual inline package (DIP), a quad flat package (QFP), and a ball grid array (BGA). Of these, the BGA type semiconductor package is realized by arranging circular ball-shaped leads on a package bottom, and so it has the significantly reduced package size. In addition, the mounting area size of components is reduced since the lead does not protrude out of the side of the package, and it is strong against a noise since the lead has a small ball shape. Due to such advantages, the BGA type semiconductor package is usually used as the stack-type semiconductor package 1. FIG. 1A shows the BGA type semiconductor package.
A base package 10 is arranged in the lowest layer of the stack-type semiconductor package 1 to be directly connected to a printed circuit board (PCB) 50 or a socket. A plurality of ball-shaped leads 13 are arranged below the base package 10, and a plurality of ball pads 55 are arranged on the PCB 50 or the socket, corresponding to a plurality of leads 13. Each lead 13 of the base package 10 is electrically connected to the corresponding ball pad 55 of the PCB 50 or the socket to transmit a signal.
A plurality of pads 15 are arranged on the base package 10 for electrically connection with a stack package 20 that is to be arranged above the base package 10. A plurality of pads 15 of the base package 10 are configured in a pattern corresponding to leads 23 of the stack package 20.
The base package 10 further comprises a repeater 11. The repeater 11 transmits various signals such as an address, data, and a command that are applied through the PCB 50 or the socket to the base package 10 when the signals are for the base package 10, but does not transmit the signals to the stack packages 20 to 40. But the repeater 11 transmits the signals to the stack packages 20 when the signals applied through the PCB 50 or the socket are for the stack packages 20 to 40.
As shown in FIG. 1A, three stack packages 20 to 40 are stacked above the base package 10. The stack packages 20 and 30 comprise repeaters 21 and 31, ball-shaped leads 23 and 33, and pads 25 and 35, similarly to the base package 10.
The leads 23 and 33 of the stack packages 20 and 30 are smaller in number than those of the base package 10. That is, the base package 10 receives/outputs all signals received/outputted to/from the stack packages 20 and 30 as well as itself from/to the PCB 50 and, thus it has a large number of leads. However, the stack package 20 does not need to receive/output signals for the base package 10, and the stack package 40 receives/outputs only signals for itself. The stack packages 20 and 30 comprise pads 25 and 35 corresponding to the leads 33 and 43 of the stack packages 30 and 40, respectively. The stack packages 20 and 30 comprise repeaters 21 and 31 to determine whether signals are inputted/outputted to/from the stack packages 30 and 40. In FIG. 1A, the repeaters 11 to 31 are shown as discrete devices in the base package 10 and the stack packages 20 and 30, but it is for the convenience of explanation, and they are a part of the semiconductor chips in the package.
The stack package 40 is arranged at the highest layer of the stack-type semiconductor package 1, and so it does not need to transmit data upwardly. The stack package 40 comprises leads 43 for electrical connection with the stack package 30, but it does not need a pad or a repeater. However, it may comprise a pad and a repeater for a case where a function of the stack-type semiconductor package 1 is extended, so that a stack package is added above the stack package 40.
FIG. 1B is an exploded view illustrating individual packages of the related art stack-type semiconductor package of FIG. 1A. FIG. 1B shows the base package 10 and the stack package 20 as part of the stack-type semiconductor package 1 of FIG. 1A. In FIG. 1A, the leads 13 to 43 and the pads 15 to 35 are not classified into input ones and output ones, but for the convenience of explanation, in FIG. 1B, the leads are classified into input leads 13 and 23 and output leads 14 and 24, and the pads are classified into input pads 16 and 26 and output pads 15 and 25.
Let us assume that the stack-type semiconductor package 1 is a semiconductor memory device. An input signal in_sig such as an address, data, and a command is applied from an external memory controller, and it is then inputted to a plurality of input leads 13 of the base package 10 through the PCB 50. The base package 10 analyzes the input signal in_sig and performs a corresponding operation to the input signal in_sig when it is a signal for the base package 10. When a read command and an address are applied as the input signal in_sig and the address is for the base package 10, the repeater 11 does not transmit the input signal in_sig to the stack package 20, and the base package 10 outputs data of the corresponding address as an output signal out_sig through the output leads 14.
However, when the input signal in_sig is not a signal for the base package 10, the repeater 11 outputs the input signal in_sig to the output pads 15. The input signals in_sig outputted to the output pads 15 are applied to the stack package 20 through the input leads 23 of the stack package 20 that are electrically connected to the output pads 15. Like the repeater 11 of the base package 10, the repeater 21 of the stack package 20 analyzes the input signal in_sig to determine whether it is a signal for the stack package 20 or not. The repeater 21 performs a corresponding operation when the input signal in_sig is a signal for the stack package 20. However, when it is not a signal for the stack package 20, the repeater 21 outputs it through the output pads 25 again. When a read command and an address are applied as the input signal in_sig and the address is for the stack package 20, the stack package 20 outputs data of the corresponding address through the output leads 24. If data is applied to the base package 10 through the input pads 16 of the base package 10, that are electrically connected to the output leads 24 of the stack package 20, the repeater 11 of the base package 10 externally outputs transmitted data as the output signal out_sig through the output leads 14.
FIG. 1C is a timing diagram illustrating an operation of the related art stack-type semiconductor package of FIG. 1B. In FIG. 1C, an input signal in_sig1 is a signal for the base package 10, and an input signal in_sig2 is a signal for the stack package 20.
Since the input signal in_sig2 is a signal for the stack package 20, the repeater 11 of the base package 10 analyzes it and then applies it to the stack package 20. Thus, the input signal in_sig2 is delayed by a predetermined time and then is inputted to the stack package 20. The stack package 20 outputs data as the output signal out_sig after a column latency (CL) in response to a read command of the input signal in_sig2. However, since the input signal in_sig1 is a signal for the base package 10, there is little delay. Thus, the base package 10 receives the input signal in_sig1 rapidly compared to the stack package 20. In this instance, an output timing of the output signal out_sig outputted according to the input signals in_sig1 and in_sig2 becomes different. When the input signal in_sig1 is applied to compensate such a timing error of the output signal out_sig, the base package 10 delays it by a repeater delay and then performs a predetermined operation.
FIG. 2 shows a related art stack-type semiconductor package socket.
A test of the stack-type semiconductor package is classified into an individual package test for respectively testing the base package 10 and the stack packages 20 to 40 and a stack-type semiconductor package test for testing all packages stacked. The individual package test is to determine whether each of the base package 10 and the stack packages 20 to 40 is defective or not, and the stack-type semiconductor package test is to determine whether the whole stack-type semiconductor package 1 operates normally or not. Both test equipment for the individual package test and test equipment for the stack-type semiconductor package test have a socket. The socket of FIG. 2 is one example of the test equipment for the stack-type semiconductor package test, and FIG. 2 shows that the stack-type semiconductor package 1 is inserted into the socket.
The socket of FIG. 2 is explained below with reference to FIG. 1A. The socket comprises a package connection portion 70 that is electrically connected to the lead 13 of the stack-type semiconductor package 1 to be inserted for transmits a signal between the PCB 50 and the stack-type semiconductor package 1. The socket further comprises a lower case 63 for fixing the package connection portion 70 and a socket fixing means 69 for fixing the package connection portion 70 and the lower case 63 to the PCB 50. Here, a screw may be used as the socket fixing means 69. The sock et further comprises an upper case 65 and an upper case fixing means 67. The upper case 65 is arranged above the stack-type semiconductor package 1, and the lower and upper cases 63 and 65 are fixed by the upper case fixing means 67. At this time, pressure is applied to the stack-type semiconductor package 1, so that the stack-type semiconductor package 1 and the package connection portion 70 are electrically connected. The package connection portion 70 comprises a plurality of connection terminals which respectively correspond to a plurality of leads 13 of the base package 10. A plurality of connection terminals electrically connect corresponding leads 13, respectively, to transmit a signal between the PCB 50 and the corresponding leads 13 when the stack-type semiconductor package 1 is inserted into the socket.
FIG. 2 shows the stack-type semiconductor package socket, but the individual package socket has a similar configuration to that of FIG. 2, except that the individual packages are inserted instead of the stack-type semiconductor package 1. Also, the test equipment has a plurality of sockets in order to test a plurality of individual packages or a plurality of stack-type semiconductor packages. In this instance, it is not efficient that each package is inserted into each socket and the upper case is fixed. For this reason, the test equipment may have a handler for applying predetermined pressure when a plurality of individual packages or a plurality of stack-type semiconductor packages are inserted. Even when the handler is used, the package connection portion 70 should be fixed to the PCB 50.
FIGS. 3A and 3B are photographs illustrating examples of the package connection portion of the related art stack-type semiconductor package socket of FIG. 2. As the connection terminals of the package connection portion 70 of the socket for the stack-type semiconductor package of FIGS. 1A and 1B, such as the BGA type semiconductor package, a connection terminal using a pogo pin or a pressure conductive rubber (PCR) terminal is usually used.
FIG. 3A shows the connection terminal using the pogo pin. The package connection portion 70 comprises a plurality of pogo pins 71. The pogo pin 71 has a structure that upper and lower portions are divided, an elastic member such as a spring is arranged thereinside, and the upper and lower portions electrically connect to each other when predetermined pressure is applied. FIG. 3B shows the connection terminal using the PCR. The connection terminal of FIG. 3B comprises a plurality of PCR terminals 72 that have electrical conductivity and an elastic force when pressure is applied, and an insulator that insulates a plurality of PCR terminals from each other. As the connection terminal of the package connection portion 70, the pogo pin 71 of FIG. 3A and the PCR terminal 72 of FIG. 3B transmit a signal between the stack-type semiconductor package 1 and the PCB 50 when predetermined pressure is applied.
In case of testing the stack-type semiconductor package using the stack-type semiconductor package socket or the handler, both the individual package test and the stack-type semiconductor package test use only the lower leads. That is, in case of the individual package test, the test is performed such that a signal is inputted/outputted to/from the individual package by using the lower leads, and in case of the stack-type semiconductor package test, the test is performed by using only the leads of the base package.
However, in case of the individual package test, a test for a function of the repeater is insufficient. In case of the stack-type semiconductor package test, all functions including a function of the repeater can be tested, but when a defect occurs, the whole stack-type semiconductor package can not be used or the individual semiconductor packages stacked should be disassembled and reassembled, leading to an increment of repairing cost and time. In addition, it is very difficult to find out which package has a problem in the stack-type semiconductor package.